The present invention relates to a semiconductor memory device and, more particularly, to element isolation and .alpha.-ray soft error prevention techniques for dynamic random-access memories (hereinafter referred to as "DRAM's").
Isolation of semiconductor elements from each other is generally effected by a combination of a field insulator film defined by a silicon oxide film formed by oxidation of the surface of a semiconductor substrate and a channel stopper region. An impurity for forming a channel stopper region is introduced by ion implantation before formation of a field insulator film, and the introduced impurity is diffused by making use of heat which is applied to the semiconductor substrate when thermal oxidation is effected in order to form a field insulator film. A technique similar to that described above is used in isolation of elements in a DRAM. It should be noted that techniques related to element isolation are described, for example, in "VLSI Device Handbook", Science Forum, Nov. 28, 1983, page 63.
Soft errors in DRAM's are mainly caused by generation of electron-hole pairs by .alpha.-rays. As known techniques used to prevent generation of soft errors by .alpha.-rays, there is one example in which a heavily-doped semiconductor region which serves as a potential barrier against the electron-hole pairs is formed under a region on a semiconductor substrate in which memory cells are to be formed. An impurity for forming the heavily-doped semiconductor region is introduced under an active region in a memory cell region, after the formation of a field insulator film defined by a silicon oxide film formed by oxidation of the surface of the semiconductor substrate, by ion implantation using the field insulator film as a mask. Such a DRAM soft error preventing technique is described, for example, in the specification of Japanese Patent Laid-Open No. 94451/1984.
A channel stopper region is formed prior to the formation of a field insulator film defined by a silicon oxide film formed by oxidation of the surface of the semiconductor substrate, and after the formation of the field insulator film, a heavily-doped semiconductor region (hereinafter also referred to as an "impurity-introduced region" for convenience) on the semiconductor substrate and under a region in which a Metal Insulator Semiconductor Field Effect Transistor (MISFET: hereinafter referred to as a "MISFET") is to be formed for the purpose of lowering the substrate resistance in order to prevent latchup of a Complementary Metal Oxide Semiconductor (CMOS: hereinafter referred to as "CMOS"). An impurity for forming the heavily-doped semiconductor region is introduced under the region in which a MISFET is to be formed by ion implantation carried out through the field insulator film. The channel stopper region formed as described above and the heavily-doped semiconductor region are connected together under the field insulator film and formed in such a manner as to surround the region in which a MISFET is to be formed. Such a technique is described, for example, in the specification of Japanese Patent Laid-Open No. 10268/1986.